In deep learning hardware, the most precious resource is not raw arithmetic capacity, but memory bandwidth. While GPU compute power (FLOPS) has scaled exponentially over the past decade, memory bandwidth between High Bandwidth Memory (HBM) and on-chip Static RAM (SRAM) has grown at a much slower rate.
In 2022, Tri Dao et al. introduced FlashAttention, fundamentally changing how transformers are trained and served. By restructuring the self-attention algorithm to be IO-Aware (aware of the memory hierarchy speeds between HBM and SRAM), FlashAttention computes exact attention with speedups while cutting memory footprint from quadratic to linear .
1. The Standard Attention Memory Wall
In traditional self-attention:
The IO Roundtrip Penalty
For a sequence length of :
- The attention matrix contains elements ( per attention head).
- Standard implementations write to HBM, read from HBM to compute Softmax, write back to HBM, and read again to multiply by .
- The GPU spends over 80% of its execution time waiting on memory bus read/write transfers, rather than performing useful matrix multiplications on Tensor Cores.
2. FlashAttention-1: Tiling and Online Softmax
FlashAttention achieves its breakthrough through two core mathematical and engineering innovations: Tiling and Online Softmax Reduction.
The Mathematics of Online Softmax
Standard Softmax requires a full pass across all elements in a row to find the maximum value for numerical stability, followed by a second pass to compute the denominator sum .
The Online Softmax algorithm allows computing Softmax incrementally across blocks without seeing the entire row upfront:
- When processing block 1, compute local max and local sum .
- When processing block 2, compute local max . If , the new global max is .
- Rescale the previous accumulated output block by and update the running sum:
This allows the entire attention operation to be computed in a single fused CUDA kernel pass, reading once from HBM and writing once to HBM!
3. The Generational Evolution: FlashAttention 1 vs 2 vs 3
Feature Comparison Matrix
| Feature / Architecture | Standard Attention | FlashAttention-1 | FlashAttention-2 | FlashAttention-3 |
|---|---|---|---|---|
| VRAM Memory Complexity | (Quadratic) | (Linear) | (Linear) | (Linear) |
| HBM Memory Accesses | reads/writes | reads/writes | reads/writes | reads/writes |
| A100 Peak TFLOPS Utilization | 15% – 25% | 35% – 45% | 55% – 73% | N/A (Hopper specific) |
| H100 FP16 Throughput | ~150 TFLOPS | ~350 TFLOPS | ~650 TFLOPS | ~850 TFLOPS (FP8: 1.4 PFLOPS) |
| Hardware Primitives Used | Standard PyTorch CUDA | Shared Memory Tiling | Warp Shuffling & Parallel-Q | TMA, WGMMA, FP8 GEMM, Ping-Pong Scheduling |
4. FlashAttention-3: Harnessing NVIDIA Hopper Silicon
FlashAttention-3 exploits the hardware features of NVIDIA Hopper (H100/H200) architecture:
- Tensor Memory Accelerator (TMA): A dedicated hardware copy engine that transfers 2D/3D tensor tiles between global HBM and shared memory without using register files or stalling SM execution pipelines.
- Asynchronous Ping-Pong Pipelining: While Tensor Cores multiply Block , the TMA concurrently loads Block into alternate SRAM buffers, hiding memory latency completely.
- WGMMA (Warpgroup Matrix Multiply and Accumulate): Groups of 4 warps (128 threads) execute unified matrix multiplications in lockstep.
5. Summary & Key Takeaways
- IO-Aware Design is the Future of AI Systems: Designing algorithms to minimize slow HBM memory roundtrips yields orders-of-magnitude higher speedups than adding raw FLOPs.
- Tiling and Online Softmax Eliminate Quadratic Memory: Computing running Softmax statistics allows full attention to execute inside small on-chip SRAM scratchpads.
- FlashAttention-2 Achieves 70%+ GPU Utilization: Streamlining non-matrix math and optimizing warp parallelism made FA-2 the default standard in open-source inference engines.
- FlashAttention-3 Unlocks Hopper Potential: Leveraging TMA and asynchronous ping-pong execution on H100 GPUs delivers up to 1.4 PetaFLOPS of FP8 attention throughput.